Espressif Systems /ESP32 /I2C0 /SCL_START_HOLD

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCL_START_HOLD

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TIME

Fields

TIME

This register is used to configure the clock num between the negedge of SDA and negedge of SCL for start mark.

Links

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